The thesis presents design and implementation of components for recoding of signals between binary PCM and a bitstream representation. The bitstream representation enables real time signal processing using a power efficient algorithm for time-domain cross-correlation. The greatest savings are made when the system is restricted to a low oversampling ratio (OSR).
A fully digital Delta Sigma encoder is presented. The low OSR is the largest limiting factor in the system. Both simulations and measured results of the implemented modulator shows an achievable signal to noise ratio (SNR) in the range 30-35dB.
Digital ﬁlters are designed for sampling rate conversion between the Nyquist rate and the oversampled rate. Considerations and trade-offs speciﬁc to ﬁlter design in a Delta Sigma context are given. Several measures are taken to improve power efficiency of the circuits, while evaluating the impact on signal quality after conversion.
Both filters and the Delta Sigma encoder are implemented in 90nm CMOS on a single 1mm² chip, together with the cross-correlator. Circuit performance is evaluated for all circuits by theoretical considerations, simulations and chip measurements.