RIMFAX is a ground penetrating radar currently under development by The Norwegian Defence Research Establishment (FFI). The radar signal is a sine wave that will be generated digitally by a Direct Digital Synthesizer, which is implemented on a FPGA. A sine wave DDS basic building blocks are a phase accumulator and a ROM of stored sine wave samples. The ROM is potentially very resource intensive and methods exist to reduce the resource consumption of a DDS on a FPGS. This thesis explores two methods for reducing consumption.These have been implemented on a Kintex-7 FPGA, in addition to a IP based DDS from the Vivado Design Suite and a DDS resembling the current RIMFAX prototype. Output signal has been characterized using a spectrum analyzer, for various DDS configurations adjusting bit lengths of output amplitude, phase address bits used internally and the input word defining the output frequency, for characterizing changes in behaviour, set up against a requirement of having integrated phase noise performance of -80 dBc or better for the frequency offset range 1 kHz - 30 kHz. Best performance with regards to both resource utilization and output characteristics was the Nicholas Compression DDS, which offered phase noise within requirements and had the lowest resource utilization.