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dc.contributor.authorSærsten, Joar Digernes
dc.date.accessioned2016-08-21T22:28:38Z
dc.date.available2016-08-21T22:28:38Z
dc.date.issued2016
dc.identifier.citationSærsten, Joar Digernes. Single ASIC NFC Sensor Tag. Master thesis, University of Oslo, 2016
dc.identifier.urihttp://hdl.handle.net/10852/51447
dc.description.abstractIn order to use a smart phone or smart watch with the near field communication (NFC) standard to read sensor data from a micro-implant, an NFC tag with integrated ADC and sensor front-end is implemented. An NFC digital protocol module is combined with an energy efficient front-end, ADC, energy harvester and NFC data link to form a passive NFC tag with a fully integrated and complete sensor interface. This work builds on previous work where parts of this system have been designed and tested as standalone solutions. Previously, a sensor interface ASIC has been developed that provides the front-end to a resistive or capacitive sensor and converts its output (e.g. blood sugar concentration) into digital data ready to be transferred. Another NFC physical layer ASIC has been developed which hosts the energy harvesting and physical communication layer required to operate with an NFC enabled mobile phone, or other NFC readers. An implementation of the NFC digital protocol has been created and tested on a FPGA together with the physical communication layer and front-end and ADC. The FPGA implementation was modified further to be synthesized and combined with the two previous ASICs into a single ASIC. A power-on reset circuit was implemented for the digital core’s startup conditioning on power up. The main contributions of this work has been to add the higher level NFC protocol control logic module as well as a power-on reset circuit, and to integrate all of these modules onto a single system-on-chip (SoC).eng
dc.language.isoeng
dc.subjectADC
dc.subjectlogic synthesis
dc.subjectdigital logic
dc.subjectPower-on reset (POR)
dc.subjectSoC
dc.subjectNFC
dc.subjectfront-end
dc.titleSingle ASIC NFC Sensor Tageng
dc.typeMaster thesis
dc.date.updated2016-08-21T22:28:38Z
dc.creator.authorSærsten, Joar Digernes
dc.identifier.urnURN:NBN:no-54916
dc.type.documentMasteroppgave
dc.identifier.fulltextFulltext https://www.duo.uio.no/bitstream/handle/10852/51447/5/Joar_Digernes_Saersten_master_thesis_may_2016_Single_ASIC_Sensor_Tag.pdf


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