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Two-Phase Dynamic Ultra-Low Voltage VLSI Digital Design

Mo, Alexander
Master thesis
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Two-Phase-Dynam ... Voltage-Digital-Design.pdf (10.03Mb)
Year
2014
Permanent link
http://urn.nb.no/URN:NBN:no-46556

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  • Institutt for informatikk [3608]
Abstract
A new logic style named Two-Phase Dynamic Ultra-Low Voltage (TP-DULV) logic is developed. The new logic style uses the increased gate voltage swing from the ULV FG technique and introduces a new concept for ensuring a higher tolerance against random process variations when operating at ultra-low voltage supplies.
 
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