As most radio communication is based on a narrow banded carrier technique, the technique this thesis is based on utilizes single impulse transmissions and wide bandwidths. The technique is called Ultra WideBand Impulse Radio (UWBIR) and is based on emission of single pulses and time domain processing. Through modulation and pulse shaping energy is contained within a specific band in the frequency spectrum. This implies that the technique is low power compared to narrow banded techniques wasting energy on a carrier wave conveying no info. Most radio receivers even UWB radio receivers is based on a template sampling scheme for signal detection and the utilization of a Digital Signal Processing (DSP) unit for signal processing.
In this thesis a novel low power frontend for impulse radio receiverssuitable for implementation in standard Complementary Metal Oxide Silicon (CMOS) technology is presented. The novel architecture is exploring thresholding and continuous-time delay lines avoiding high speed sampling clocks. The thresholding scheme is based on simple inverter structures, the topology consists of a Low Noise Amplifier (LNA), integrator, thresholding pulse shaper and pulse shape detector all in standard digital CMOS technology. The continuous time front-end utilizes no sampling clock and is designed to work with a RAKE receiver for low power ultra wideband applications. As reflections are destructive for most types of radio communication, the combined topology with the frontend and RAKE receiver utilizes reflections constructively as a gain in Signal to Noise Ratio (SNR).